18:44
NASIR ALI
Central Processing Unit Design This module will explore the design of the central processing unit from the logic designer’s view. A unibus implementation of the SRC is discussed in detail along with the Data Path Design and the Control Unit Design.
The topics covered in this module are outlined below:
• The Design Process
• Unibus Implementation of the SRC
• Structural RTL for the SRC
• Logic Design for one bus SRC
• The Control Unit
• 2-bus and 3-bus designs
• The machine reset
• The machine exceptions
As we progress through this list of topics, we will learn how to convert the earlier specified behavioral RTL into a concrete structural RTL. We will also learn how to interconnect various programmer visible registers to get a complete data path and how to incorporate various control signals into it. Finally, we will add the machine reset and exception capability to our processor.
The topics covered in this module are outlined below:
• The Design Process
• Unibus Implementation of the SRC
• Structural RTL for the SRC
• Logic Design for one bus SRC
• The Control Unit
• 2-bus and 3-bus designs
• The machine reset
• The machine exceptions
As we progress through this list of topics, we will learn how to convert the earlier specified behavioral RTL into a concrete structural RTL. We will also learn how to interconnect various programmer visible registers to get a complete data path and how to incorporate various control signals into it. Finally, we will add the machine reset and exception capability to our processor.
The design process
The design process of a processor starts with the specification of the behavioral RTL for its instruction set. This abstract description is then converted into structural RTL which shows the actual implementation details. Since the processor can be divided into two main sub-systems, the data path and the control unit, we can split the design procedure into two phases.
1. The data path design
2. The control unit design
It is important that the design activity of these important components of the processor be carried out with the pros and cons of adopting different approaches in mind. As we know, the execution time is dependent on the following three factors. ET = IC x CPI x T
During the design procedure we specify the implementation details at an advanced level. These details can affect the clock cycle per instruction and the clock cycle time. Hence following things should be kept in mind during the design phase. • Effect on overall performance • Amount of control hardware • Development time
